Skip to content

Commit 0eaeb4d

Browse files
committed
[cheriot,rtl] Integrate TRVK filter into Ibex top
Signed-off-by: Thomas Benz <tbenz@lowrisc.org>
1 parent c4ad698 commit 0eaeb4d

9 files changed

Lines changed: 287 additions & 56 deletions

File tree

‎dv/formal/check/top.sv‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -142,7 +142,33 @@ localparam logic [31:0] CSR_MIMPID_VALUE = 32'b0;
142142

143143
default clocking @(posedge clk_i); endclocking
144144

145+
// The TRVK (CHERIoT revocation) filter is only instantiated when BaseIsa is
146+
// BaseIsaRV32IorCHERIoT. The core has no CHERIoT support yet and the formal spec
147+
// is the plain RISC-V Sail model, so select BaseIsaRV32I to bypass the filter
148+
// (a combinational pass-through of the data interface). The filter's ports still
149+
// exist on ibex_top, so provide nets for the `.*` connection below: drive the
150+
// inputs to their inactive values and leave the outputs as sinks.
151+
logic [31:0] trvk_heap_base_addr_i;
152+
logic data_tag_o;
153+
logic data_tag_i;
154+
logic trvk_revbm_req_o;
155+
logic trvk_revbm_gnt_i;
156+
logic trvk_revbm_rvalid_i;
157+
logic [31:0] trvk_revbm_addr_o;
158+
logic [31:0] trvk_revbm_rdata_i;
159+
logic [ 6:0] trvk_revbm_rdata_intg_i;
160+
logic trvk_revbm_err_i;
161+
162+
assign trvk_heap_base_addr_i = 32'b0;
163+
assign data_tag_i = 1'b0;
164+
assign trvk_revbm_gnt_i = 1'b0;
165+
assign trvk_revbm_rvalid_i = 1'b0;
166+
assign trvk_revbm_rdata_i = 32'b0;
167+
assign trvk_revbm_rdata_intg_i = 7'b0;
168+
assign trvk_revbm_err_i = 1'b0;
169+
145170
ibex_top #(
171+
.BaseIsa(ibex_pkg::BaseIsaRV32I),
146172
.DmHaltAddr(DmHaltAddr),
147173
.DmExceptionAddr(DmExceptionAddr),
148174
.SecureIbex(SecureIbex),

‎dv/riscv_compliance/rtl/ibex_riscv_compliance.sv‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -180,6 +180,8 @@ module ibex_riscv_compliance (
180180
// First instruction executed is at 0x0 + 0x80
181181
.boot_addr_i (32'h00000000 ),
182182

183+
.trvk_heap_base_addr_i (32'h00000000 ),
184+
183185
.instr_req_o (host_req[CoreI] ),
184186
.instr_gnt_i (host_gnt[CoreI] ),
185187
.instr_rvalid_i (host_rvalid[CoreI] ),
@@ -196,10 +198,20 @@ module ibex_riscv_compliance (
196198
.data_addr_o (host_addr[CoreD] ),
197199
.data_wdata_o (host_wdata[CoreD] ),
198200
.data_wdata_intg_o ( ),
201+
.data_tag_o ( ),
199202
.data_rdata_i (host_rdata[CoreD] ),
200203
.data_rdata_intg_i (ibex_data_rdata_intg ),
204+
.data_tag_i (1'b0 ),
201205
.data_err_i (host_err[CoreD] ),
202206

207+
.trvk_revbm_req_o ( ),
208+
.trvk_revbm_gnt_i (1'b0 ),
209+
.trvk_revbm_rvalid_i (1'b0 ),
210+
.trvk_revbm_addr_o ( ),
211+
.trvk_revbm_rdata_i ('0 ),
212+
.trvk_revbm_rdata_intg_i ('0 ),
213+
.trvk_revbm_err_i (1'b0 ),
214+
203215
.irq_software_i (1'b0 ),
204216
.irq_timer_i (1'b0 ),
205217
.irq_external_i (1'b0 ),

‎dv/uvm/core_ibex/ibex_dv.f‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,10 +50,17 @@
5050
${LOWRISC_IP_DIR}/ip/prim/rtl/prim_secded_39_32_dec.sv
5151
${LOWRISC_IP_DIR}/ip/prim/rtl/prim_secded_72_64_enc.sv
5252
${LOWRISC_IP_DIR}/ip/prim/rtl/prim_secded_72_64_dec.sv
53+
${LOWRISC_IP_DIR}/ip/prim/rtl/prim_fifo_sync_cnt.sv
54+
${LOWRISC_IP_DIR}/ip/prim/rtl/prim_fifo_sync.sv
55+
56+
// Vendored PULP common cells (used by the TRVK filter).
57+
${PRJ_DIR}/vendor/pulp_common_cells/rtl/stream_fork.sv
58+
${PRJ_DIR}/vendor/pulp_common_cells/rtl/stream_join_dynamic.sv
5359

5460
// ibex CORE RTL files
5561
+incdir+${PRJ_DIR}/rtl
5662
${PRJ_DIR}/rtl/ibex_pkg.sv
63+
${PRJ_DIR}/rtl/ibex_cheriot_pkg.sv
5764
${PRJ_DIR}/rtl/ibex_tracer_pkg.sv
5865
${PRJ_DIR}/rtl/ibex_tracer.sv
5966
${PRJ_DIR}/rtl/ibex_alu.sv
@@ -81,6 +88,7 @@
8188
${PRJ_DIR}/rtl/ibex_register_file_latch.sv
8289
${PRJ_DIR}/rtl/ibex_pmp.sv
8390
${PRJ_DIR}/rtl/ibex_core.sv
91+
${PRJ_DIR}/rtl/ibex_trvk.sv
8492
${PRJ_DIR}/rtl/ibex_top.sv
8593
${PRJ_DIR}/rtl/ibex_top_tracing.sv
8694

‎dv/uvm/core_ibex/tb/core_ibex_tb_top.sv‎

Lines changed: 35 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -95,29 +95,30 @@ module core_ibex_tb_top;
9595
assign {scramble_key, scramble_nonce} = scrambling_key_if.d_data;
9696

9797
ibex_top_tracing #(
98-
.PMPEnable (PMPEnable ),
99-
.PMPGranularity (PMPGranularity ),
100-
.PMPNumRegions (PMPNumRegions ),
101-
.MHPMCounterNum (MHPMCounterNum ),
102-
.MHPMCounterWidth (MHPMCounterWidth ),
103-
.RV32E (RV32E ),
104-
.RV32M (RV32M ),
105-
.RV32B (RV32B ),
106-
.RegFile (RegFile ),
107-
.BranchTargetALU (BranchTargetALU ),
108-
.WritebackStage (WritebackStage ),
109-
.ICache (ICache ),
110-
.ICacheECC (ICacheECC ),
111-
.ICacheTweakInfection (ICacheTweakInfection),
112-
.SecureIbex (SecureIbex ),
113-
.LockstepOffset (LockstepOffset ),
114-
.ICacheScramble (ICacheScramble ),
115-
.BranchPredictor (BranchPredictor ),
116-
.DbgTriggerEn (DbgTriggerEn ),
117-
.DmBaseAddr (DmBaseAddr ),
118-
.DmAddrMask (DmAddrMask ),
119-
.DmHaltAddr (DmHaltAddr ),
120-
.DmExceptionAddr (DmExceptionAddr )
98+
.BaseIsa (ibex_pkg::BaseIsaRV32I),
99+
.PMPEnable (PMPEnable ),
100+
.PMPGranularity (PMPGranularity ),
101+
.PMPNumRegions (PMPNumRegions ),
102+
.MHPMCounterNum (MHPMCounterNum ),
103+
.MHPMCounterWidth (MHPMCounterWidth ),
104+
.RV32E (RV32E ),
105+
.RV32M (RV32M ),
106+
.RV32B (RV32B ),
107+
.RegFile (RegFile ),
108+
.BranchTargetALU (BranchTargetALU ),
109+
.WritebackStage (WritebackStage ),
110+
.ICache (ICache ),
111+
.ICacheECC (ICacheECC ),
112+
.ICacheTweakInfection (ICacheTweakInfection ),
113+
.SecureIbex (SecureIbex ),
114+
.LockstepOffset (LockstepOffset ),
115+
.ICacheScramble (ICacheScramble ),
116+
.BranchPredictor (BranchPredictor ),
117+
.DbgTriggerEn (DbgTriggerEn ),
118+
.DmBaseAddr (DmBaseAddr ),
119+
.DmAddrMask (DmAddrMask ),
120+
.DmHaltAddr (DmHaltAddr ),
121+
.DmExceptionAddr (DmExceptionAddr )
121122

122123
) dut (
123124
.clk_i (clk ),
@@ -132,6 +133,7 @@ module core_ibex_tb_top;
132133

133134
.hart_id_i (32'b0 ),
134135
.boot_addr_i (BootAddr ),
136+
.trvk_heap_base_addr_i (32'b0 ),
135137

136138
.instr_req_o (instr_mem_vif.request ),
137139
.instr_gnt_i (instr_mem_vif.grant ),
@@ -149,10 +151,20 @@ module core_ibex_tb_top;
149151
.data_be_o (data_mem_vif.be ),
150152
.data_rdata_i (data_mem_vif.rdata ),
151153
.data_rdata_intg_i (data_mem_vif.rintg ),
154+
.data_tag_i (1'b0 ),
152155
.data_wdata_o (data_mem_vif.wdata ),
153156
.data_wdata_intg_o (data_mem_vif.wintg ),
157+
.data_tag_o ( ),
154158
.data_err_i (data_mem_vif.error ),
155159

160+
.trvk_revbm_req_o ( ),
161+
.trvk_revbm_gnt_i (1'b0 ),
162+
.trvk_revbm_rvalid_i (1'b0 ),
163+
.trvk_revbm_addr_o ( ),
164+
.trvk_revbm_rdata_i ('b0 ),
165+
.trvk_revbm_rdata_intg_i ('b0 ),
166+
.trvk_revbm_err_i (1'b0 ),
167+
156168
.irq_software_i (irq_vif.irq_software ),
157169
.irq_timer_i (irq_vif.irq_timer ),
158170
.irq_external_i (irq_vif.irq_external ),

‎examples/simple_system/rtl/ibex_simple_system.sv‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -240,6 +240,8 @@ module ibex_simple_system (
240240
// First instruction executed is at 0x0 + 0x80
241241
.boot_addr_i (32'h00100000),
242242

243+
.trvk_heap_base_addr_i (32'h00000000),
244+
243245
.instr_req_o (instr_req),
244246
.instr_gnt_i (instr_gnt),
245247
.instr_rvalid_i (instr_rvalid),
@@ -256,10 +258,20 @@ module ibex_simple_system (
256258
.data_addr_o (host_addr[CoreD]),
257259
.data_wdata_o (host_wdata[CoreD]),
258260
.data_wdata_intg_o (),
261+
.data_tag_o (),
259262
.data_rdata_i (host_rdata[CoreD]),
260263
.data_rdata_intg_i (data_rdata_intg),
264+
.data_tag_i (1'b0),
261265
.data_err_i (host_err[CoreD]),
262266

267+
.trvk_revbm_req_o (),
268+
.trvk_revbm_gnt_i (1'b0),
269+
.trvk_revbm_rvalid_i (1'b0),
270+
.trvk_revbm_addr_o (),
271+
.trvk_revbm_rdata_i ('0),
272+
.trvk_revbm_rdata_intg_i ('0),
273+
.trvk_revbm_err_i (1'b0),
274+
263275
.irq_software_i (1'b0),
264276
.irq_timer_i (timer_irq),
265277
.irq_external_i (1'b0),

‎ibex_core.core‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ filesets:
1212
- lowrisc:prim:clock_gating
1313
- lowrisc:prim:lfsr
1414
- lowrisc:prim:mubi
15+
- lowrisc:prim:fifo
1516
- lowrisc:ibex:ibex_pkg
1617
- lowrisc:ibex:ibex_icache
1718
- lowrisc:dv:dv_fcov_macros

‎rtl/ibex_pkg.sv‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,11 @@ package ibex_pkg;
3232
// Parameter Enums //
3333
/////////////////////
3434

35+
typedef enum integer {
36+
BaseIsaRV32I = 0, // only RV32I
37+
BaseIsaRV32IorCHERIoT = 1 // dual base ISA: RV32I/CHERIoT runtime switchable
38+
} base_isa_e;
39+
3540
typedef enum integer {
3641
RegFileFF = 0,
3742
RegFileFPGA = 1,

0 commit comments

Comments
 (0)