Name		Name	Last commit message	Last commit date
REPORT		REPORT
SOURCES		SOURCES
WAVEFORM		WAVEFORM
README.md		README.md
prog1.data		prog1.data
prog2.data		prog2.data
prog3.data		prog3.data

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SC Processor

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An implementation of a single cycle processor based on Instruction Set Architecture (ISA) of MIPS

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