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Handle 128-bit writes to GS privileged registers - #243

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GTTeancum wants to merge 1 commit into
ran-j:mainfrom
GTTeancum:codex/gs-privileged-sq
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Handle 128-bit writes to GS privileged registers#243
GTTeancum wants to merge 1 commit into
ran-j:mainfrom
GTTeancum:codex/gs-privileged-sq

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Handle SQ stores to GS privileged registers by forwarding the low 64-bit lane to the existing register handler and discarding the upper lane. Non-FIFO 128-bit hardware writes use this behavior in PCSX2 as well. Without it, games that update DISPFB through SQ silently lose framebuffer flips.\n\nAdds a PS2Memory regression covering the target register and adjacent-slot preservation.\n\nTested: MINITEST_FILTER='quadword stores update one GS privileged register slot' ps2x_tests.exe

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