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cortex-r5

Here are 6 public repositories matching this topic...

easyzoom / aix-skills

Reusable Agent Skills for embedded systems, MCU debugging, firmware workflows, and AI automation. （嵌入式、MCU 调试、固件流程与 AI 自动化的可复用 Agent Skills 集合）。

automation cortex-m firmware templates embedded-systems riscv developer-tools cursor esp-idf openocd ai-agents cortex-r5 ai-workflows agent-skills claude-skills

Updated Jul 17, 2026
Python

SoCXin / ASR1606

L4 R2: ASR 624MHz Cortex-R5 Cat.1 SoC (ASR1606/ASR1602)

soc asr cortex-r5 qitas cat1bis asr1602 ml307a ml307r

Updated May 1, 2024
C++

t-kuha / mpsoc-r5

Zynq Ultrascale+ MPSoC RPU examples

zynq xilinx mpsoc rpu cortex-r5

Updated Sep 28, 2024
C++

coldnew-examples / ultrazed_pciecc_helloR5

UltraZed-EG PCIe Carrier Card example: Hello World on Cortex-R5

example xilinx vivado ultrazed-eg-pciecc cortex-r5

Updated Dec 5, 2018
VHDL

bimalka98 / EN2030-Processor-Dissection

An in-depth investigation of Intel Core i3-8300 and ARM Cortex R5 processors(one from CISC architecture and the other from RISC architecture) as partial fulfilment of the UOM's EN2030 - Fundamentals of Computer Organization and Design Module🖥💻

cortex-r5 intel-core-i3

Updated Nov 27, 2020
TeX

guclumhg / r5f-freertos-protocol-simulator

A Zynq UltraScale+ R5F protocol bridge simulated on a Raspberry Pi Pico 2W with FreeRTOS, measured against an 86.8 us byte deadline, with a live dashboard

real-time embedded freertos uart iso-tp cortex-m33 cortex-r5 raspberry-pi-pico zynq-ultrascale rp2350

Updated Sep 1, 2026
C

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