soc-interconnect

Here are 3 public repositories matching this topic...

AMBA APB Master-Slave protocol implementation in Verilog with zero-wait and wait-state support.

verilog amba-apb rtl-design soc-interconnect

AMBA AHB-Lite interconnect implementation in Verilog

hardware verilog rtl-design amba-ahb soc-interconnect

AXI-based DMA engine (memory-to-memory transfer) in Verilog

verilog dma amba rtl-design direct-memory-access soc-interconnect

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